Add to ORKGAbstract: We consider a problem of synthesis of irredundant logic networks in the basis {&,¬} and similar bases which implement Boolean functions on n variables and allow short single fault detection tests regarding stuck-at-1 or stuck-an-0 faults on outputs of gates. For each Boolean function permitting implementation by an irredundant circuit, the minimal possible length value of such a test is found. In particular, it is proved that this value does not exceed three.Note: Research direction:Mathematical modelling in actual problems of science and technic
Abstract: Problem statement: The faults in digital circuit can be classified broadly as single stuck...
It is shown that at most, n + 3 tests are required to detect any single stuck-at fault in an AND gat...
An efficient method is proposed for detecting hard- to-detect stuck-at faults of combinational circu...
Abstract: For each Boolean function, we find the exact value of minimal possible length of...
Abstract: The following assertions are proved: for each natural k, there exists a basis co...
Abstract: We consider a problem of synthesis of logic networks implementing Boo lean funct...
Abstract: We consider a problem of synthesis of irredundant logic circuits in the basis {&...
Abstract: We consider a problem of synthesis of irredundant logic circuits in the basis {&...
Abstract: It is established that one can implement almost any Boolean function on n variab...
Abstract: It is proved that one can implement any Boolean function by a logic network in t...
Many efficient ways for two-level logic minimization of Boolean functions have been presented. They ...
Abstract: We consider a problem of synthesis of two-pole contact circuits which realize Bo...
Abstract: Nontrivial lower bounds on lengths of the minimal single fault detection and dia...
Detection testing of Boolean functions implemented by Boolean circuits, which are affected by single...
AbstractWe investigate a model of gate failure for Boolean circuits in which a faulty gate is restri...
Abstract: Problem statement: The faults in digital circuit can be classified broadly as single stuck...
It is shown that at most, n + 3 tests are required to detect any single stuck-at fault in an AND gat...
An efficient method is proposed for detecting hard- to-detect stuck-at faults of combinational circu...
Abstract: For each Boolean function, we find the exact value of minimal possible length of...
Abstract: The following assertions are proved: for each natural k, there exists a basis co...
Abstract: We consider a problem of synthesis of logic networks implementing Boo lean funct...
Abstract: We consider a problem of synthesis of irredundant logic circuits in the basis {&...
Abstract: We consider a problem of synthesis of irredundant logic circuits in the basis {&...
Abstract: It is established that one can implement almost any Boolean function on n variab...
Abstract: It is proved that one can implement any Boolean function by a logic network in t...
Many efficient ways for two-level logic minimization of Boolean functions have been presented. They ...
Abstract: We consider a problem of synthesis of two-pole contact circuits which realize Bo...
Abstract: Nontrivial lower bounds on lengths of the minimal single fault detection and dia...
Detection testing of Boolean functions implemented by Boolean circuits, which are affected by single...
AbstractWe investigate a model of gate failure for Boolean circuits in which a faulty gate is restri...
Abstract: Problem statement: The faults in digital circuit can be classified broadly as single stuck...
It is shown that at most, n + 3 tests are required to detect any single stuck-at fault in an AND gat...
An efficient method is proposed for detecting hard- to-detect stuck-at faults of combinational circu...